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<H1>Re: [MUD-Dev] memory and speed</H1>
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<LI><em>To</em>: <A HREF="mailto:mud-dev#kanga,nu">mud-dev#kanga,nu</A></LI>
<LI><em>Subject</em>: Re: [MUD-Dev] memory and speed</LI>
<LI><em>From</em>: Caliban Tiresias Darklock <<A HREF="mailto:caliban#darklock,com">caliban#darklock,com</A>></LI>
<LI><em>Date</em>: Thu, 10 Jun 1999 21:30:17 -0700</LI>
<LI><em>Reply-To</em>: <A HREF="mailto:mud-dev#kanga,nu">mud-dev#kanga,nu</A></LI>
<LI><em>Sender</em>: <A HREF="mailto:mud-dev-admin#kanga,nu">mud-dev-admin#kanga,nu</A></LI>
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<PRE>
On 05:28 PM 6/10/99 -0700, I personally witnessed Matthew Mihaly jumping up
to say:
>
>We tripled our memory today, from 128 megs to 384 megs, but we seem to
>actually have slowed down. In fact, adding more memory has definitely
>slowed us down. Some tasks are taking nearly twice as long as before. This
>is extremely upsetting, to say the least. Anyone have any ideas?
I have a thought, but I don't know how relevant it is these days. I'm not
very hardware-literate anymore in terms of newer memory systems. All of
this is valid for older 72-pin and 30-pin SIMM and DIMM modules, but the
newer stuff I just don't have a lot of knowledge of.
Some (bad) cache implementations are really per-chip caches. So when you
stick a bigger chip into a slot -- like a 64 meg RAM chip instead of a 32
-- that cache gets fewer hits. It becomes less effective. When you spread
your RAM evenly across slots using minimum size chips to get the RAM you
need, that can mean faster performance. This is one reason why the same
motherboard may perform differently with a single 128 meg chip than it does
with two 64 megs or four 32 megs. Other cache implementations are even
worse, and "top out" -- they cache the first X megs of RAM, and that's it.
If your data is in the rest of RAM, your cache is missed entirely. I also
seem to recall that the first 512K cache machines really did a 256K cache
of the first 64 MB, and a 256K cache of the second 64MB... which was
actually pretty smart at the time, since the performance of a 256K cache
was within epsilon of a 512K cache on any given amount of RAM, and back
then 128 MB was an insane amount of memory anyway.
The thought process behind both of these is to match what PC manufacturers
are doing -- using lots of small RAM chips instead of one big one -- and
what users are doing, which is sticking a lot of RAM in the system that
they don't need. This actually works pretty well under Windows, but under
alternate operating systems it really bites. As a result, I'd probably go
to a hardware manufacturer who sold systems with my preferred O/S installed
than just grab something off the shelf and drop my favorite O/S on it. The
specialised manufacturer is likely to know things I don't about the MB I'm
getting, and to choose one that will work well for the O/S I'm installing.
Unless my favorite O/S happened to be Windows. Which, in my case, it sort
of is -- as long as I only have one computer running (other than my PS/2
XT, which will run DOS until it dies), it will be running Windows. But I'm
in the market for a couple more, so if you happen to have two old P60s and
a couple PII machines lying around... give me a shout. I'm also looking for
a good deal on a reasonably recent G3, if only so I can say I have one. ;)
-----
| Caliban Tiresias Darklock caliban#darklock,com
| Darklock Communications <A HREF="http://www.darklock.com/">http://www.darklock.com/</A>
| U L T I M A T E U N I V E R S E I S N O T D E A D
| 774577496C6C6E457645727355626D4974H -=CABAL::3146=-
_______________________________________________
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<li><strong><A NAME="00748" HREF="msg00748.html">Re: [MUD-Dev] memory and speed</A></strong>
<ul compact><li><em>From:</em> Mark Gritter <mark#erdos,Stanford.EDU></li></ul>
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<LI><STRONG><A NAME="00725" HREF="msg00725.html">[MUD-Dev] memory and speed</A></STRONG>
<UL><LI><EM>From:</EM> Matthew Mihaly <diablo#best,com></LI></UL></LI>
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<ul><li>Thread context:
<BLOCKQUOTE><UL>
<LI><STRONG>Re: [MUD-Dev] memory and speed</STRONG>, <EM>(continued)</EM>
<ul compact>
<ul compact>
<LI><strong><A NAME="00740" HREF="msg00740.html">Re: [MUD-Dev] memory and speed</A></strong>,
J C Lawrence <a href="mailto:claw#varesearch,com">claw#varesearch,com</a>, Fri 11 Jun 1999, 03:58 GMT
</LI>
</ul>
<LI><strong><A NAME="00737" HREF="msg00737.html">Re: [MUD-Dev] memory and speed</A></strong>,
J C Lawrence <a href="mailto:claw#varesearch,com">claw#varesearch,com</a>, Fri 11 Jun 1999, 03:01 GMT
<UL>
<LI><strong><A NAME="00755" HREF="msg00755.html">Re: [MUD-Dev] memory and speed</A></strong>,
Matthew Mihaly <a href="mailto:diablo#best,com">diablo#best,com</a>, Fri 11 Jun 1999, 15:25 GMT
<UL>
<LI><strong><A NAME="00764" HREF="msg00764.html">Re: [MUD-Dev] memory and speed</A></strong>,
Adam Wiggins <a href="mailto:adam#angel,com">adam#angel,com</a>, Fri 11 Jun 1999, 18:13 GMT
</LI>
</UL>
</LI>
</UL>
</LI>
<LI><strong><A NAME="00742" HREF="msg00742.html">Re: [MUD-Dev] memory and speed</A></strong>,
Caliban Tiresias Darklock <a href="mailto:caliban#darklock,com">caliban#darklock,com</a>, Fri 11 Jun 1999, 04:35 GMT
<UL>
<LI><strong><A NAME="00748" HREF="msg00748.html">Re: [MUD-Dev] memory and speed</A></strong>,
Mark Gritter <a href="mailto:mark#erdos,Stanford.EDU">mark#erdos,Stanford.EDU</a>, Fri 11 Jun 1999, 06:47 GMT
</LI>
</UL>
</LI>
<LI><strong><A NAME="00746" HREF="msg00746.html">Re: [MUD-Dev] memory and speed</A></strong>,
Ben Greear <a href="mailto:greear#cyberhighway,net">greear#cyberhighway,net</a>, Fri 11 Jun 1999, 05:53 GMT
<UL>
<LI><strong><A NAME="00750" HREF="msg00750.html">Re: [MUD-Dev] memory and speed</A></strong>,
Matthew Mihaly <a href="mailto:diablo#best,com">diablo#best,com</a>, Fri 11 Jun 1999, 15:24 GMT
</LI>
</UL>
</LI>
<LI><strong><A NAME="00733" HREF="msg00733.html">Re: [MUD-Dev] memory and speed</A></strong>,
Chris Gray <a href="mailto:cg#ami-cg,GraySage.Edmonton.AB.CA">cg#ami-cg,GraySage.Edmonton.AB.CA</a>, Fri 11 Jun 1999, 02:33 GMT
</LI>
</ul>
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